Product Summary

The ADSP-TS201SABPZ060 is an ultrahigh performance, static superscalar processor optimized for large signal processing tasks and communications infrastructure. The ADSP-TS201SABPZ060 combines very wide memory widths with dual computation blocks—supporting floating-point (IEEE 32-bit and extended precision 40-bit) and fixed-point (8-, 16-, 32-, and 64-bit) processing— to set a new standard of performance for digital signal processors. The ADSP-TS201SABPZ060 lets the DSP execute up to four instructions each cycle, performing 24 fixed-point (16-bit) operations or six floating-point operations.



Parametrics

ADSP-TS201SABPZ060 absolute maximum ratings: (1)Internal (Core)Supply Voltage (VDD): –0.3 V to +1.4 V; (2)Analog (PLL)Supply Voltage (VDD_A): –0.3 V to +1.4 V; (3)External (I/O)Supply Voltage (VDD_IO): –0.3 V to +3.5 V; (4)External (DRAM)Supply Voltage (VDD_DRAM): –0.3 V to +2.1 V; (5)Input Voltage: –0.63 V to +3.93 V; (6)Output Voltage Swing: –0.5 V to VDD_IO+0.5 V; (7)Storage Temperature Range: –65°C to +150°C; (8)IIH High Level Input Current @VDD_IO=Max, VIN=VIH Max: 20 μA.

Features

ADSP-TS201SABPZ060 features: (1)Up to 600MHz, 1.67 ns instruction cycle rate; (2)24M bits of internal—on-chip—DRAM memory; (3)25 mm × 25 mm (576-ball)thermally enhanced ball grid array package; (4)Dual-computation blocks—each containing an ALU, a multiplier, a shifter, a register file, and a communications logic unit (CLU); (5)Dual-integer ALUs, providing data addressing and pointer manipulation; (6)Integrated I/O includes 14-channel DMA controller, external port, four link ports, SDRAM controller, programmable flag pins, two timers, and timer expired pin for system integration; (7)1149.1 IEEE-compliant JTAG test access port for on-chip emulation; (8)Single-precision IEEE 32-bit and extended-precision 40-bit floating-point data formats and 8-, 16-, 32-, and 64-bit fixed-point data formats.



Diagrams

ADSP-TS201SABPZ060 pin connection

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